How to crack CEDT test and interview?
The Centre for Electronics Design and Technology was established in 1974 at the Indian Institute of Science, Bangalore.CEDT started its postgraduate Diploma programme in Electronics Design and Technology in 1975. Initially this programme was made available exclusively to engineers sponsored by industries and R&D Institutions.
The course can be regarded as by far the best industry oriented post graduate course in India.It also ensures 100% placements to those pursuing the course.
Candidates who have written gate papers IN,EC,EE are eligible for applying to this programme.Of all the applications,the department shortlists candidates with gate score as the benchmark.Although exact cut-offs for calling for the test are unknown, from the trends found in the last 2 years,score around 98 percentile in any of the papers mentioned here is sufficient for being called for the test.The test will be actually gruelling.It has a healthy mix of questions from basic electronics,digital electronics, microprocessors ( 8085 and 8086). Also some questions come based on the relationship between various entities as learnt in solid state devices.The variation pattern for eg: the junction capacitance with forward biasing etc get asked.So have a glance through your solid state book.
The questions are mainly application level questions.A few questions on the industrial application of different motors are also asked which will give an equal opportunity for pure electrical guys.Questions from mathematics like fourier transform will also be asked.The last question of the paper would be one from graphics.They give importance only to your concepts and neatness is not a criterion.
The application for the programme can be done online as well as through forms issued by IISc.One important thing to keep in mind while applying is to give CEDT as the first preference in your list.The problem is if you give some M E programmes which do not have a separate test,they may publish the list before the date of EDT test.In that case the officials will not allow those who have got admission to those courses to appear for the EDT test.The institute sends call letter to selected candidates for the test by post.But I would advise you to better keep in touch with the admissions division of IISc.In case of missing letter, you can just call them up and say.Then they will permit you to take the test.The results of the test will be published both in the notice board of the department or in the website www.edt.iisc.ernet.in/admissions by 6 pm on the day of the test.The test will be followed by an interview for selected candidates. The interview will be conducted by around 4 different panels each consisting of 4 members.The panel contains highly renowned faculty of the department..Be prepared with your B tech project for the interview.For candidates with job experience in the relevant field, can also expect questions about the work they have done.The results will be published within 2 weeks of the interview normally.
So all the best to those who are appearing for the test and I will try to post some model questions also in my blog.Comments are welcome from readers.In short, if u get admission in this programme,even though it is a bit taxing u can be assured to have a good career ahead.
The course can be regarded as by far the best industry oriented post graduate course in India.It also ensures 100% placements to those pursuing the course.
Candidates who have written gate papers IN,EC,EE are eligible for applying to this programme.Of all the applications,the department shortlists candidates with gate score as the benchmark.Although exact cut-offs for calling for the test are unknown, from the trends found in the last 2 years,score around 98 percentile in any of the papers mentioned here is sufficient for being called for the test.The test will be actually gruelling.It has a healthy mix of questions from basic electronics,digital electronics, microprocessors ( 8085 and 8086). Also some questions come based on the relationship between various entities as learnt in solid state devices.The variation pattern for eg: the junction capacitance with forward biasing etc get asked.So have a glance through your solid state book.
The questions are mainly application level questions.A few questions on the industrial application of different motors are also asked which will give an equal opportunity for pure electrical guys.Questions from mathematics like fourier transform will also be asked.The last question of the paper would be one from graphics.They give importance only to your concepts and neatness is not a criterion.
The application for the programme can be done online as well as through forms issued by IISc.One important thing to keep in mind while applying is to give CEDT as the first preference in your list.The problem is if you give some M E programmes which do not have a separate test,they may publish the list before the date of EDT test.In that case the officials will not allow those who have got admission to those courses to appear for the EDT test.The institute sends call letter to selected candidates for the test by post.But I would advise you to better keep in touch with the admissions division of IISc.In case of missing letter, you can just call them up and say.Then they will permit you to take the test.The results of the test will be published both in the notice board of the department or in the website www.edt.iisc.ernet.in/admissions by 6 pm on the day of the test.The test will be followed by an interview for selected candidates. The interview will be conducted by around 4 different panels each consisting of 4 members.The panel contains highly renowned faculty of the department..Be prepared with your B tech project for the interview.For candidates with job experience in the relevant field, can also expect questions about the work they have done.The results will be published within 2 weeks of the interview normally.
So all the best to those who are appearing for the test and I will try to post some model questions also in my blog.Comments are welcome from readers.In short, if u get admission in this programme,even though it is a bit taxing u can be assured to have a good career ahead.
11 comments:
Thnks anand..........very usefull info.
thanx man... though u r making me nervous , i guess i just hve to work hrder.. id be glad if u can be in contact.. i need sum1 who can guide me... my mail is s_bharat_raj@yahoo.com
and once again thanx a lot.. c ya...
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Thank you Anand for your valuable information.
hey i had the cedt test today and everything went exactly as you have said in your post. amazing accuracy!
Sir I want to ask can a student given his gate paper in CS apply for M.Tech in CEDT.
Sir I want to ask that can a student who had given his gate paper in CS apply for the M.Tech in CEDT.
Where is admin?!
Thanks
Hi,
According to you candidates who give gate paper in IN,EC or EE are eligible for CFDT, but on the admission site it given that gate paper must be in same branch of qualifying exam.
what ur say about this?
because I am in aerospace engineering in IITK and want to take admission in CEDT.
THANKS anand
Thanks Anand
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